Impurity Redistribution during Silicon Epitaxial Growth and Semiconductor Device Processing

A model has been developed that can account for both front and back "autodoping" effects during epitaxial growth as well as impurity redistribution during further high-temperature processing. The model incorporates three dopant fluxes, i.e., (i) the flux from the solid into the gas phase at the rear of the wafer, (ii) the flux from the solid to the front surface of the wafer, and (iii) the flux from the bulk gas phase into the boundary layer near the front surface of the wafer in which transport of dopant occurs by diffusion only. The redistribution of impurities both within the solid semiconductor and in the gas phase are investigated from a theoretical viewpoint. Numerical solutions are obtained using the Crank-Nicolson method. Implications of differences between this approach and previous work are discussed. Calculated results are presented to illustrate the variety of problems that may be solved using this mathematical approach. The distr ibution of impurit ies in epitaxial ly grown silicon layers plays a major role in the operation of diodes, transistors, and integrated circuits. The impur i ty redis t r ibut ion that occurs dur ing silicon epitaxial processing and semiconductor device fabrication is dependent upon processing times and temperatures, diffusivities, evaporat ion rates, and segregation coefficients of the dopants in the solid and gaseous phases. A model for the redis tr ibut ion process wou]d enable one to assess the critical steps in the fabrication sequence and predict the effect of process changes on the impur i ty distr ibution in the semiconductor. A typical device processing sequence may consist of fifteen discrete h ightempera ture steps that affect the impur i ty redistr ibution. Since the results of the prior step form the init ial conditions for the present step, analytical solutions to the diffusion or t ransport equations are not available. Therefore, a sequential numerical technique is the obvious choice to solve this type of processing problem. At present only f ragmentary parts of this problem have been solved and no complete model exists. BackgroundmEpitaxial Growth Since the largest single unknown in calculating the impur i ty redis tr ibut ion dur ing device fabrication is the redis t r ibut ion due to epitaxial growth, this process step will be treated in great detail. The prior efforts on modeling the substrate and layer impur i ty redis t r ibut ion during epitaxial silicon growth can be divided into three categories based upon the source of the impurity. The first and earliest approach involved the transfer of dopant from the front surface of the substrate (12), mixing of this dopant with the gas phase, and subsequent reincorporat ion of this dopant into the growing epitaxial layer. This t rea tment completely ignored solid-state diffusion as the other major mechanism for dopant transport. The second approach to the redistr ibut ion involved the t ransport of dopant by diffusion in the solid only (3-4). The effects of the ambient gas phase were neglected. A more detailed analysis of this approach was made by Abe et al. (5). A numerical approach was used in order to treat the steps prior to the deposition of the epitaxial layer. The influence of the gas phase on the redis tr ibut ion process was ignored and the case of slow layer growth was not successfully treated. The third approach to the redis tr ibut ion prob